Non-volatile memory devices such as Solid State Drives (SSDs) are finding new applications in consumer electronics. For example, they are replacing Hard Disk Drives (HDDs), which typically comprise rapidly rotating disks (platters). Non-volatile memories, sometimes referred to as ‘flash memories’ or ‘flash memory devices’ (for example, NAND and NOR flash memory devices), are used in media storage, cameras, mobile phones, mobile computers, laptop computers, USB flash drives, etc. Non-volatile memory can provide a relatively reliable, compact, cost-effective, and easily accessible method of storing data when the power is off.
Flash memory controllers are used to manage the data stored in the non-volatile memory, and to act as an interface between a host system and the non-volatile memory. The data received from the host system can be stored in a buffer and simple error detection and correction can be performed on the data before writing the data into the flash memory. Generally, a write path inside a flash memory controller may provide a channel to program the flash memory. However, in some instances, the write path may be prone to errors. When an error is detected in the write path for a data block received from the buffer, the flash memory controller generally halts all the write operations to the flash memory issued after the data block with the write path error. The flash memory controller has to correct the errors in the write path, resend the corrected data block and then resume the write operations to the flash memory. This may introduce unnecessary latency in the write operations to the flash memory.
In some instances, parity data may be used to provide error detection and correction for the write path. For example, the parity data may be calculated by performing an XOR operation on the received data block with the previously received data blocks. However, error in one data block may result in the wrong parity data calculation. Thus, the parity data may also need to be corrected which can introduce additional latency in the data path.